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MIC2186
Micrel
MIC2186
Low Voltage PWM Control IC Final Information
General Description
Micrel's MIC2186 is a high efficiency boost PWM control IC. With its wide input voltage range of 2.9V to 14V, the MIC2186 can be used to efficiently boost voltages in 1- or 2-cell Li Ion battery powered applications, as well as to boost voltages in fixed 3.3V, 5V, or 12V systems. Its powerful 1.6 output driver allows the MIC2186 to supply large output currents with the selection of proper external MOSFETs. The MIC2186 can be configured to operate at 100kHz, 200kHz, or 400kHz. With it's fixed frequency PWM architecture, and easily synchronized drive, the MIC2186 is ideal for noise-sensitive telecommunications applications. MIC2186 also features a low current shutdown mode of 0.5A and programmable undervoltage lockout. A manually selectable SKIP Mode allows high efficiencies in light load situations. The MIC2186 is available in 16 pin SOIC and QSOP package options with an operating range from -40C to 125C.
Features
* * * * * * * * * * * * * * * Input voltage range: 2.9V to 14V 1.6 output driver Oscillator frequency of 100kHz/200kHz/400kHz Frequency sync to 600kHz Front edge blanking PWM Current Mode Control Selectable light load SKIP mode 600A quiescent current (SKIP-Mode) 0.5A shutdown current Cycle-by-Cycle current limiting Frequency foldback protection Adjustable under-voltage lockout Precision 1.245V reference output 16 pin SOIC and QSOP package options Selectable 50% maximum duty cycle for flyback applications DC power distribution systems Wireless Modems ADSL line cards SLIC power supplies 1-and 2-cell Li Ion battery operated equipment
Applications
* * * * *
Ordering Information
Part Number MIC2186BM MIC2186BQS Frequency 100kHz/200kHz/400kHz 100kHz/200kHz/400kHz Voltage Adj Adj Ambient Temp. Range -40C to +125C -40C to +125C Package 16-lead SOP 16-lead QSOP
Typical Application
VIN = 3.3V 2.2H MBR2535CT VOUT = 12V
CIN 120F 20V
1 7 13 15 10 4 8 2 11
VINA EN/UVLO HIDC FREQ/2 VDD COMP VREF SKIP SYNC SS
3
12V Output Efficiency
VINP FB MIC2186 OUTN CSH
14 9 16 6
COUT 150F(x2) 20V
95 90
EFFICIENCY (%)
85 80 75 70 65 60 0 VIN = 3.3V 0.5 1 1.5 2 2.5 OUTPUT CURRENT (A) 3
Si4404DY (x2)
4.5m PGND SGND
5 12
Adjustable Output Boost Converter
Micrel, Inc. * 1849 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 944-0970 * http://www.micrel.com
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MIC2186
MIC2186
Micrel
Pin Configuration
VINA 1 SKIP 2 SS 3 COMP 4 SGND 5 FB 6 EN/UVLO 7 VREF 8 16 VINP 15 FREQ/2 14 OUTN 13 HIDC 12 PGND 11 SYNC 10 VDD 9 CSH
16-pin Narrow Body SOP (M) 16-pin QSOP (QS)
Pin Description
Pin Number 1 2 Pin Name VINA SKIP Pin Function Input voltage to control circuitry (2.9V to 14V). SKIP (Input): Regulator operates in PWM mode (no pulse skipping) when pin is pulled low, and skip mode when raised to Vdd. There is no automatic switching between PWM and skip mode available on this device. Soft start reduces the inrush current and delays and slows the output voltage rise time. A 5A current source will charge the capacitor up to Vdd. Compensation (Output): Internal error amplifier output. Connect to a capacitor or series RC network to compensate the regulator's control loop. Small signal ground: must be routed separately from other grounds to the (-) terminal of Cout. Feedback Input - regulates FB to 1.245V. Enable/Undervoltage Lockout (input): A low level on this pin will power down the device, reducing the quiescent current to under 0.5A. This pin has two separate thresholds, below 1.5V the output switching is disabled, and below 0.9V the device is forced into a complete micropower shutdown. The 1.5V threshold functions as an accurate undervoltage lockout (UVLO) with 135mV hysteresis. The 1.245V reference is available on this pin. A 0.1F capacitor should be connected form this pin to SGnd. The (+) input to the current limit comparator. A built in offset of 100mV between CSH and SGnd in conjunction with the current sense resistor sets the current limit threshold level. This is also the (+) input to the current amplifier. 3V internal linear-regulator output. Vdd is also the supply voltage bus for the chip. Bypass to SGND with 1F. Maximum source current is 0.5mA. Frequency Synchronization (Input): Connect an external clock signal to synchronize the oscillator. Leading edge of signal above 1.5V starts switching cycle. Connect to SGND if not used. MOSFET driver power ground, connects to the bottom of the current sense resistor and the (-) terminal of CIN. High Duty Cycle. Sets duty cycle and frequency along with Freq/2. Logic HIGH sets 85% maximum duty cycle. Logic LOW sets 50% maximum duty cycle. See applications section for more information. High current drive for N channel MOSFET. Voltage swing is from ground to VIN. RON is typically 1.6. Sets duty cycle and frequency along with HiDC. See applications section for more information. Power input voltage to the gate drive circuitry (2.9V to 14V). This pin is normally connected to the output voltage.
3 4 5 6 7
SS COMP SGND FB EN/UVLO
8 9
VREF CSH
10 11
VDD SYNC
12 13
PGND HIDC
14 15 16
OUTN FREQ/2 VINP
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Absolute Maximum Ratings (Note 1)
Supply Voltage (VINA, VINP) ......................................... 15V Digital Supply Voltage (VDD) ........................................... 7V SKIP Pin Voltage (VSKIP) ................................. -0.3V to 7V Max Duty Cycle Pin Voltage (VHIDC) ................ -0.3V to 7V Frequency Divider Pin Voltage (VFREQ/2) ........ -0.3V to 7V Sync Pin Voltage (VSYNC) ................................ -0.3V to 7V Comp Pin Voltage (VCOMP) .............................. -0.3V to 3V Feedback Pin Voltage (VFB) ............................ -0.3V to 3V Enable Pin Voltage (VEN/UVLO) ...................... -0.3V to 15V Current Sense Voltage (VCSH) ......................... -0.3V to 1V Power Dissipation (PD) 16 lead SOP .............................. 400mW @ TA = 85C 16 lead QSOP ........................... 245mW @ TA = 85C Ambient Storage Temp ............................ -65C to +150C ESD Rating (Note 3)
Operating Ratings (Note 2)
Supply Voltage (VINA, VINP) ........................ +2.9V to +14V Operating Ambient Temperature ......... -40C TA +85C Junction Temperature ....................... -40C TJ +125C PackageThermal Resistance JA 16-lead SOP ............................................... 100C/W JA 16-lead QSOP ............................................. 163C/W
Electrical Characteristics
VINA = 5V, VINP = VOUT = 12V, SKIP = 0V, FREQ/2 = 0V, HiDC = 3V, VCSH = 0V, TJ = 25C, unless otherwise specified. Bold values indicate -40C < TJ < +125C. Parameter Regulation Feedback Voltage Reference (1%) (2%) 3V VINA 9V; 0mV CSH 75mV; (3%) Feedback Bias Current Output Voltage Line Regulation Output Voltage Load Regulation Input & VDD Supply VINA Input Current, PWM mode VINP Input Current, PWM mode VINA Input Current, SKIP mode Shutdown Quiescent Current Digital Supply Voltage (VDD) Digital Supply Load Regulation Undervoltage Lockout VSKIP = 0V VSKIP = 0V (excluding external MOSFET gate current) VSKIP = 5V VEN/UVLO = 0V; (IVINA + IVINP) IL = 0 IL = 0 to 0.5mA VDD upper threshold (turn on threshold) VDD lower threshold (turn off threshold) Reference Output (VREF) Reference Voltage (1.5%) (2.5%) Reference Voltage Line Regulation Reference Voltage Load Regulation 5V < VinA < 9V 0 < IREF < 100A 1.226 1.213 2 1 1.245 1.264 1.276 V V mV mV 2.9 2.82 0.7 2.8 0.6 0.5 3.0 0.03 2.75 2.65 5 3.18 mA mA mA A V V V V 3V VINA 9V 0mV CSH 75mV 1.233 1.220 1.208 1.245 50 +0.08 -1.2 1.245 1.258 1.270 1.282 V V V nA %/V % Condition Min Typ Max Units
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Parameter Enable/UVLO Enable Input Threshold UVLO Threshold UVLO Hysteresis Enable Input Current Soft Start Soft Start Current Current Limit Current Limit Threshold Voltage Error Amplifier Error Amplifier Gain Current Amplifier Current Amplifier Gain SKIP Input SKIP Threshold SKIP Input Current HIDC Input HIDC Threshold Oscillator Section Oscillator Frequency (fO) Maximum Duty Cycle Minimum On Time FREQ/2 Frequency (fO) Frequency Foldback Threshold Frequency Foldback Frequency SYNC Threshold Level SYNC Input Current SYNC Minimum Pulse Width SYNC Capture Range Gate Drivers Rise/Fall Time Output Driver Impedance CL = 3300pF source; VINP = 12V sink; VINP = 12V source; VINP =5V sink; VINP = 5V
Note 1.
Micrel
Condition Min Typ Max Units
0.6 1.4
0.9 1.5 140
1.2 1.6
V V mV A A
VEN/UVLO = 5V
0.2
5
5
(Voltage on CSH to trip current limit)
80
100
120
mV
20
V/V
3.7
V/V
0.6 VSKIP = 3V 0.6
1.4 0.1
2.2 5
V A
1.4
2.2
V
360 VFB = 1.0V, VHIDC = 3V VFB = 1.0V, VHIDC = 0V VFB = 1.5V, VHiDC = 3V VHiDC = 3V, VFREQ/2 = 3V Measured on FB VHiDC = 3V, VFREQ/2 = 0V 0.6 170
400 85 50 180 200 0.3 90 1.4 0.1
440
kHz % ns
230
kHz V kHz
2.2 5
V A ns
200 Note 4 fO + 15 % 50 1.8 1.6 2.6 2.4 4 3.5 600
kHz
ns
Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(max), the junction-to-ambient thermal resistance, JA, and the ambient temperature, TA. The device is not guaranteed to function outside its operating rating. Devices are ESD sensitive. Handling precautions recommended. See application information for limitations on maximum operating frequency.
Note 2. Note 3. Note 4.
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Typical Characteristics
Quiescent Current vs. Temperature (SKIP Mode)
0.8 0.7 0.6
IQ (mA) IQ(PWM) (mA) IQ(SKIP) (mA)
Quiescent Current vs. Temperature (PWM Mode)
3.65 3.6 3.55 3.5 3.45 3.4 VINA = 5VDC VINP = 12VDC IQ = IQVINA+IQVINP 4 3.5 3 2.5 2 1.5 1
Quiescent Current vs. Input Voltage(PWM Mode)
400kHz
0.5 0.4 0.3 0.2 0.1 VINA = 5VDC VINP = 12VDC IQ = IQVINA+IQVINP
200kHz 100kHz
0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
3.35 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
VINP =12VDC 0.5 I = I Q QVINA+IQVINP 0 0 2 4 6 8 10 12 14 16 INPUT VOLTAGE (VINA)
Quiescent Current vs. Input Voltage (PWM Mode)
4 3.5 3
IQ(PWM) (mA) IQ (mA)
Quiescent Current vs. Input Voltage (SKIP Mode)
0.9 1.2452
REFERENCE VOLTAGE (V)
Reference Voltage vs. Input Voltage
VINP = 12VDC 1.245 1.2448 1.2446 1.2444 1.2442 1.244 0 2 4 6 8 10 12 14 16 INPUT VOLTAGE (VINA)
VINP = 12V
0.85 0.8
VINP = 9VDC
2.5 2 1.5 1 0.5 0 0 2
VINP = 9V
0.75 0.7 0.65 0.6 0.55 0.5 0
VINP = 5VDC
VINP = 5V IQ = IQVINA + IQVINP fS = 400kHz 4 6 8 10 12 14 16 INPUT VOLTAGE (VINA)
VINP = 12VDC
2
4 6 8 10 12 14 16 INPUT VOLTAGE (VINA)
Reference Voltage vs. Reference Current
1.2451
REFERENCE VOLTAGE (V) REFERENCE VOLTAGE (V)
Reference Voltage vs. Temperature
1.2454 1.2452 1.2450 1.2448 1.2446 1.2444 1.2442 1.2440 1.2438 1.2436 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
VDD (V)
VDD vs. Input Voltage
3.10 3.05 3.00 2.95 2.90 2.85 VINP = 12VDC 2.80 0 2 4 6 8 10 12 14 INPUT VOLTAGE (VINA)
1.245 1.2449 1.2448 1.2447 1.2446 1.2445 1.2444 1.2443 0
VINP = 12VDC VINA = 5VDC
VINP = 12VDC VINA = 5VDC
20 40 60 80 100 120 REFERENCE CURRENT (A)
VDD vs. Load Current
3.035 3.030 3.025
VDD (V)
VDD vs. Temperature
3.08 VINP = 12VDC 300 3.06 V A = 5V IN DC
IENABLE (A)
Ienable vs. Venable
VINP = 12VDC -40C 250 VINA = 5VDC 200 150 100 50 0 0 2 4 6 8 10 12 14 VENABLE (V) 20C 85C
VINP = 12VDC VINA = 5VDC
VDD (V)
3.04 3.02 3.00 2.98 2.96 0.2 0.4 0.6 0.8 IVDD (mA) 1 1.2 2.94 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
3.020 3.015 3.010 3.005 3.000 2.995 0
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Oscillator Frequency vs. Input Voltage
OSCILLATOR FREQUENCY (kHz)
Oscillator Frequency vs. Temperature
OSCILLATOR FREQUENCY (kHz)
Soft Start vs. Temperature
4.75
SOFT START CURRENT (A)
406 404 402 400 398 396 394 392 0
VINP = 12VDC
405 400 395 390 385 380 375 370 VINP = 12VDC VINA = 5VDC
4.70 4.65 4.60 4.55 4.50 4.45 4.40 4.35 4.30 VINP = 12VDC
2 4 6 8 10 12 14 INPUT VOLTAGE (VINA)
365 -50 -30 -10 10 30 50 70 90 TEMPERATURE (C)
VINA = 5VDC 4.25 -50 -30 -10 10 30 50 70 90 TEMPERATURE (C)
OVERCURRENT THRESHOLD (mV)
Overcurrent Threshold vs. VINA
100 90 80 70 60 50 40 30 20 10 0 0 2 4 VINP = 12VDC 6 8 10 12 14 16 VINA (V)
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Functional Diagram
VIN CIN CDECOUP
VINA 1 VINP
L1
VREF
EN/UVLO 7
16
Bias VDD
On
D1 VOUT
SKIP 2
Control fs/4
Overcurrent Reset OutN 14
COUT
Sync 11 HiDC 13
Osc PWM Comparator
Corrective Ramp
Reset
Freq/2 15
PGND
VDD
0.1V
Soft Start 3
Overcurrent Comparator
CSH 9
Gain = 3.7
Error Amplifier
COMP 4
RSENSE
PGND 12
VREF
gm = 0.0002 Gain = 20
PGND
100k
0.3V
fs/4
VREF 8
R1
Vfb 6
VREF Frequency Foldback SGND
R2
VDD 10
VDD
SGND 5
Figure 1. MIC2186 PWM Block Diagram
Functional Description
The MIC2186 is a BiCMOS, switched mode multi-topology controller. It will operate most low side drive topologies including boost, SEPIC, flyback and forward. The controller has a low impedance driver capable of switching large Nchannel MOSFETs. It features multiple frequency and duty cycle settings. Current mode control is used to achieve superior transient line and load regulation. An internal corrective ramp provides slope compensation for stable operation above a 50% duty cycle. The controller is optimized for high efficiency, high performance DC-DC converter applications. Figure 1 shows a block diagram of the MIC2186 configured as a PWM boost converter. The switching cycle starts when OutN goes high and turns on the low side, N-channel MOSFET, Q1. The Vgs of the MOSFET is equal to VINP. This forces current to ramp up in the inductor. The inductor current flows through the current sense resistor, Rsense. The voltage across the resistor is amplified and combined with an internal ramp for stability. This signal is compared with the error voltage signal from the error amplifier. When the current signal equals the error voltage signal, the low side MOSFET is turned off. The inductor current then flows through the diode, D1, to the output. The MOSFET remains off until the beginning of the next switching cycle.
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MIC2186
MIC2186
VIN CIN CDECOUP
VINA 1 VINP
Micrel
L1
VREF
EN/UVLO 7
16
Bias VDD
On
D1 VOUT
VDD
SKIP 2 HiDC 13
Control
OutN 14
F/2=H 2us off-time F/2=L 1us off-time
COUT Q1
Freq/2 15 Sync 11
PGND
50mV
Osc
Soft Start 3
Current Reset CSH 9
Skip Current Limit Comparator RSENSE
PGND 12
COMP 4
PGND VREF 1.245V
R1
VREF 8
VREF Hysteresis Comparator 1% SGND
Vfb 6
R2
VDD 10
VDD
SGND 5
Figure 2. MIC2186 SKIP Mode Block Diagram
The description of the MIC2186 controller is broken down into 6 basic functions. * Control Loop * PWM Operation * SKIP Mode Operation * Current Limit * MOSFET gate drive * Reference, enable & UVLO * Oscillator & Sync * Soft start
Control Loop PWM and SKIP modes of operation The MIC2186 can operate in either PWM (pulse width modulated) or SKIP mode. The efficiency of the boost converter can be improved at lower output loads by manually selecting the skip mode of operation. The potential disadvantage of skip mode is the variable switching frequency that accompanies this mode of operation. The occurrence of switching pulses depends on component values as well as line and load conditions. PWM mode is the best choice of operation at higher output loads. PWM mode has the advantages of lower output ripple voltage and higher efficiencies at higher output loads. Pulling the SKIP pin (pin 3) low will force the controller to operate in PWM mode for all load conditions. Pulling the SKIP pin high will force the controller to operate in SKIP mode.
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SKIP Mode Operation This control method is used to improve efficiency at low output loads. A block diagram of the MIC2186 SKIP mode is shown in Figure 2. The power drawn by the MIC2186 control IC is (IVINA * VINA )+ (IVINP * VINP). The power dissipated by the IC can be a significant portion of the total output power during periods of low output current, which lowers the efficiency of the power supply. In SKIP mode the MIC2186 lowers the IC supply current by turning off portions of the control and drive circuitry when the IC is not switching. The disadvantage of this method is greater output ripple and variable switching frequency. The soft start, HiDC and Sync pins have no effect when operating in SKIP mode. In SKIP mode, switching starts when the feedback voltage drops below the lower threshold level of the hysteresis comparator. The OutN pin goes high, turning on the Nchannel MOSFET, Q1. Current ramps up in the inductor until either the current limit comparator or the hysteretic voltage comparator turns off Q1's gate drive. If the feedback voltage exceeds the upper hysteretic threshold, Q1's gate drive is terminated. However, if the voltage at the CSH pin exceeds the SKIP mode current limit threshold, it terminates the gate drive for that switching cycle. The gate drive remains off for a constant period at the end of each switching cycle. This off time period is typically 1s when the F/2 pin is low and 2s when the F/2 pin is high. Figure 3 shows some typical SKIP mode switching waveforms.
SKIP Mode Waveforms
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Low Current Efficiency
80 70
EFFICIENCY (%)
PWM Mode SKIP Mode
60 50 40 30 20 10 0 0
0.05 0.1 0.15 0.2 INPUT CURRENT (A)
0.25
Figure 4. The maximum peak inductor current depends on the skip current limit threshold and the value of the current sense resistor, Rsense. For a typical 50mV current limit threshold in SKIP Mode, the peak inductor current is:
IINDUCTOR_pk = 50mV RSENSE
The maximum output current is SKIP mode depends on the input conditions, output conditions and circuit component values. Assuming a discontinuous mode where the inductor current starts from zero at each cycle, the maximum output current is calculated below:
IO(max)=
VIN = 3V VO = 9V IO = 0.6A IIND@5A/div MOSFET gate drive @ 10V/div Switch Node Voltage (MOSFET Drain) @10V/div VOUT Ripple Voltage @100mV/div
2.5 x 10 -3 x L x fs 2 x RSENSE2 x VO - x VIN
(
)
TIME (10s/div)
Figure 3. SKIP Mode Waveform The SKIP mode current threshold limits the peak inductor current per cycle. Depending on the input, output and circuit parameters, many switching cycles can occur before the feedback voltage exceeds the upper hysteretic threshold. Once the voltage on the feedback pin exceeds the upper hysteretic threshold the gate drive is disabled. The output load discharges the output capacitance causing Vout to decrease until the feedback voltage drops below the lower threshold voltage limit. The switching converter then turns the gate drive back on. While the gate drive is disabled, the MIC2186 draws less IC supply current then while it is switching, thereby improving efficiency at low output loads. Figure 4 shows the efficiency improvement at low output loads when SKIP mode is selected.
where: Iomax is the maximum output current Vo is the output voltage Vin is the input voltage L is the value of the boost inductor fs is the switching frequency is the efficiency of the boost converter Rsense it the value of the current sense resistor 2.5*10-3 is a constant based on the SKIP mode current threshold (50mV)2 PWM Operation Figure 5 shows typical waveforms for PWM mode of operation. The gate drive signal turns on the external MOSFET which allows the inductor current to ramp up. When the MOSFET turns off, the inductor forces the MOSFET drain voltage to rise until the boost diode turns on and the voltage is clamped at approximately the output voltage.
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MIC2186
PWM Mode Waveforms
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the COMP pin (pin 4) to provide access to the output of the error amplifier. This allows the use of external components to stabilize the voltage loop. Current Sensing and Overcurrent Protection The inductor current is sensed during the switch on time by a current sense resistor located between the source of the MOSFET and ground (Rsense in Figure 1). Exceeding the current limit threshold will immediately terminate the gate drive of the N-channel MOSFET, Q1. This forces the Q1 to operate at a reduced duty cycle, which lowers the output voltage. In a boost converter, the overcurrent limit will not protect the power supply or load during a severe overcurrent condition or short circuit condition. If the output is short-circuited to ground, current will flow from the input, through the inductor and output diode to ground. Only the impedance of the source and components limits the current. The mode of operation (continuous or discontinuous), the minimum input voltage, maximum output power and the minimum value of the current limit threshold determine the value of the current sense resistor. Discontinuous mode is where all the energy in the inductor is delivered to the output at each switching cycle. Continuous mode of operation occurs when current always flows in the inductor, during both the low-side MOSFET on and off times. The equations below will help to determine the current sense resistor value for each operating mode. The critical value of output current in a boost converter is calculated below. The operating mode is discontinuous if the output current is below this value and is continuous if above this value.
Conditions: VIN = 3V VO = 9V IO = 0.6A
Inductor Current @ 1A/div
MOSFET gate drive @ 10V/div Switch Node Voltage (MOSFET Drain) @10V/div VOUT Ripple Voltage @50mV/div
TIME (1s/div)
Figure 5 - PWM mode waveforms The MIC2186 uses current mode control to improve output regulation and simplify compensation of the control loop. Current mode control senses both the output voltage (outer loop) and the inductor current (inner loop). It uses the inductor current and output voltage to determine the duty cycle (D) of the buck converter. Sampling the inductor current effectively removes the inductor from the control loop, which simplifies compensation. A simplified current mode control diagram is shown in Figure 6.
I_inductor VIN
Voltage Divider
I_inductor
Gate Driver
I_inductor
VREF
ICRIT =
VIN2 x VO - VIN x 2 x fs x L x VO 2
(
)
I_inductor
VCOMP
Gate Drive at OutN
TON TPER
Figure 6: PWM Control Loop A block diagram of the MIC2186 PWM current mode control loop is shown in Figure 1. The inductor current is sensed by measuring the voltage across a resistor, Rsense. The current sense amplifier buffers and amplifies this signal. A ramp is added to this signal to provide slope compensation, which is required in current mode control to prevent unstable operation at duty cycles greater than 50%. A transconductance amplifier is used as an error amplifier, which compares an attenuated output voltage with a reference voltage. The output of the error amplifier is compared to the current sense waveform in the PWM block. When the current signal rises above the error voltage, the comparator turns off the low side drive. The error signal is brought out to MIC2186 10
where: is the efficiency of the boost converter Vin is the minimum input voltage L is the value of the boost inductor Fs is the switching frequency Vo is the output voltage Maximum Peak Current in Discontinuous Mode: The peak inductor current is:
IIND(pk)= 2 x IO x VO - x VIN L x fs
(
)
where: Io is the maximum output current Vo is the output voltage Vin is the minimum input voltage L is the value of the boost inductor fs is the switching frequency is the efficiency of the boost converter The maximum value of current sense resistor is: July 2002
MIC2186
RSENSE = VSENSE IIND(pk)
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switching cycle. A small RC filter between the current sense pin and current sense resistor may help to attenuate larger switching spikes or high frequency switching noise. Adding the filter slows down the current sense signal, which has the effect of slightly raising the overcurrent limit threshold. MOSFET Gate Drive The MIC2186 converter drives a low side N-channel MOSFET. The driver for the OutN pin has a 1.6 typical source and sink impedance. The VinP pin is the supply pin for the gate drive circuit. It typically connected to the output. The maximum supply voltage to the VinP pin is 14V. If the output voltage is greater than 14V or if it is desired to drive the MOSFET with a voltage less than Vout, the VinP pin can be connected to the input or to an separate supply voltage. MOSFET Selection In a boost converter, the Vds of the MOSFET is approximately equal to the output voltage. The maximum Vds rating of the MOSFET must be high enough to allow for ringing and spikes in addition to the output voltage. The VinP pin supplies the N-channel gate drive voltage. The Vgs threshold voltage of the N-channel MOSFET must be low enough to operate at the minimum VinP voltage to guarantee the boost converter will start up. The maximum amout of MOSFET gate charge that can be driven is limited by the power dissipation in the MIC2186. The power dissipated by the gate drive circuitry is calculated below: P_gate_drive=Q_gate * VinP * fs where: Q_gate is the total gate charge of the external MOSFET The graph in Figure 7 shows the total gate charge which can be driven by the MIC2186 over the input voltage range, for different values of switching frequency. Higher gate charge will slow down the turn-on and turn-off times of the MOSFET, which increases switching losses.
Power Dissipation vs. Frequency
220 100kHz 200 180 200kHz 160 400kHz 140 500kHz 120 600kHz 100 80 60 40 20 0 0 2 4 6 8 10 12 VINP (V)
where: Vsense is the minimum current sense threshold of the CSH pin Maximum Peak Current in Continuous Mode: The peak inductor current is equal to the average inductor current plus one half of the peak to peak inductor current. The peak inductor current is:
IIND(pk)= IIND(ave) + V xI IIND(pk)= O O + VIN x 1 xI 2 IND(pp) VL x VO - VIN x 2 x VO x fs x L
(
)
where: Io is the maximum output current Vo is the output voltage Vin is the minimum input voltage L is the value of the boost inductor fs is the switching frequency is the efficiency of the boost converter VL is the voltage across the inductor VL may be approximated as Vin for higher input voltage. However, the voltage drop across the inductor winding resistance and low side MOSFET on-resistance must be accounted for at the lower input voltages that the MIC2186 operates at.
V xI VL = VIN - O O x R WINDING + RDSON VIN x
(
)
RSENSE =
VSENSE IIND(pk)
where: VSENSE is the minimum current sense threshold of the CSH pin The current sense pin, CSH, is noise sensitive due to the low signal level. The current sense voltage measurement is referenced to the signal ground pin of the MIC2186. The current sense resistor ground should be located close to the IC ground. Make sure there are no high currents flowing in this trace. The PCB trace between the high side of the current sense resistor and the CHS pin should also be short and routed close to the ground connection. The input to the internal current sense amplifier has a 30nS dead time at the beginning of each switching cycle. This dead time prevents leading edge current spikes from prematurely terminating the July 2002 11
MAXIMUM GATE CHARGE (nC)
where: Rwinding is the winding resistance of the inductor Rdson is the on resistance of the low side switching MOSFET The maximum value of current sense resistor is:
14
Figure 7 - MIC2186 freq vs pdiss External Schottky Diode In a boost converter topology, the boost diode, D1 must be rated to handle the peak and average current. The average current through the diode is equal to the average output current of the boost converter. The peak current is calculated in the current limit section of this specification.
MIC2186
MIC2186
The reverse voltage requirement of the diode is: For the MIC2186, Schottky diodes are recommended when they can be used. They have a lower forward voltage drop than ultra-fast rectifier diodes, which lowers power dissipation and improves efficiency. They also do not have a recovery time mechanism, which results in less ringing and noise when the diode turns off. If the output voltage of the circuit prevents the use of a Schottky diode, then only ultra-fast recovery diodes should be used. Slower diodes will dissipate more power in both the MOSFET and the diode. The will also cause excessive ringing and noise when the diode turns off. Reference, Enable and UVLO Circuits The output drivers are enabled when the following conditions are satisfied: * The Vdd voltage (pin 10) is greater than its undervoltage threshold. * The voltage on the enable pin is greater than the enable UVLO threshold. The internal bias circuitry generates a 1.245V bandgap reference for the voltage error amplifier and a 3V Vdd voltage for the internal supply bus. The reference voltage in the MIC2186 is buffered and brought out to pin 8. The Vref pin must be bypassed to GND (pin 4) with a 0.1uf capacitor. The Vdd pin must be decoupled to ground with a 1uf ceramic capacitor. The enable pin (pin 7) has two threshold levels, allowing the MIC2186 to shut down in a micro-current mode, or turn off output switching in standby mode. Below 0.9V, the device is forced into a micro-power shutdown. If the enable pin is between 0.9V and 1.5V the output gate drive is disabled but the internal circuitry is powered on and the soft start pin voltage is forced low. There is typically 135mV of hysteresis below the 1.5V threshold to insure the part does not oscillate on and off due to ripple voltage on the input. Raising the enable voltage above the UVLO threshold of 1.5V enables the output drivers and allows the soft start capacitor to charge. The enable pin may be pulled up to VinA. Oscillator & Sync The internal oscillator is self-contained and requires no external components. The HiDC and f/2 pins allow the user to select from three different switching frequencies and two maximum duty cycles. The chart in Table 1 shows the four combinations that can be programmed along with the typical minimum and maximum duty cycles.
F/2 pin Level 0 1 0 1 HiDC Level 1 1 0 0 Switching Frequency 400kHz 200kHz 200kHz 100kHz Maximum Duty Cycle 85% 85% 50% 50% Typical Minimum Duty Cycle 7% 6% 4% 3%
Micrel
TOFF in Skip Mode 1s 2 s 1 s 2s
Table 1 Minimum duty cycle becomes important in a boost converter as the input voltage approaches the output voltage. At lower duty cycles, the input voltage can be closer to the output voltage without the output rising out of regulation. A frequency foldback mode is enabled if the voltage on the feedback pin (pin 6) is less than 0.3V. In frequency foldback the oscillator frequency is reduced by approximately a factor of 4. For the 400kHz setting, the oscillator runs at 100khz in frequency foldback. For a 200kHz setting the oscillator runs at approximately 50kHz and for a 100kHz setting, the oscillator runs at approximately 25kHz. The SYNC input (pin 11) allows the MIC2186 to synchronize with an external CMOS or TTL clock signal. Depending on the setting of the HiDC pin,the output frequency is either equal to or 1/2 of the sync input frequency. If the HiDC level is low, the output switching frequency is half the sync frequency. If the HiDC level is high, the output switching frequency is equal to the sync frequency. The rising edge of the sync signal generates a reset signal in the oscillator, which turns off the high-side gate drive output. The low-side drive is turned on, restarting the switching cycle. The sync signal is inhibited when the controller operates in skip mode or frequency foldback. The sync signal frequency must be greater than the maximum specified free running frequency of the MIC2186. If the synchronizing frequency is lower, double pulsing of the gate drive outputs will occur. When not used, the sync pin must be connected to ground. Table 2 shows the minimum recommended sync frequencies for the different combinations of f/2 and HiDC inputs. Figure 8a shows the timing between the external sync signal (trace 2) and the low-side drive (trace 1) for a high level on the HiDC pin. Figure 8b shows the timing between the external sync signal (trace 2) and the low-side drive (trace 1) for a low level on the HiDC pin. The sync frequency is twice the output switching frequency.
F/2 pin Level
HiDC Self Oscillating Level Frequency
Minimum Recommended Sync Frequency
Sync Input Frequency fS=output switching frequency fSYNC=sync input frequency fS = fSYNC fS = fSYNC fS = 1/2 fSYNC fS = 1/2 fSYNC
0 1 0 1
1 1 0 0
400kHz 200kHz 200kHz 100kHz
480kHz 250kHz 480kHz 250kHz
Table 2 MIC2186 12 July 2002
MIC2186
MIC2186 Sync
Micrel
output capacitance. Slowing the output risetime lowers the input surge current. Soft start may also be used for power supply sequencing. The soft start cannot control the initial surge in current in a boost converter when Vin is applied. This surge current is caused by the output capacitance charging up to the input voltage. The current flows from the input through the inductor and output diode to the output capacitors. The soft start voltage is applied directly to the PWM comparator. A 5uA internal current source is used to charge up the soft start capacitor. Either of 2 UVLO conditions will pull the soft start capacitor low. * When the Vdd voltage drops below its UVLO threshold * When the enable pin drops below its 1.5V UVLO threshold The part switches at a low duty cycle when the soft start pin voltage zero. As the soft start voltage rises from 0V to 0.7V, the duty cycle increases from the minimum duty cycle to the operating duty cycle. The oscillator runs at the foldback frequency until the feedback voltage rises above 0.3V. In a boost converter the output voltage is equal to the input voltage before the MIC2186 starts switching. If the ratio of Vout/Vin is low, the voltage on the feedback pin will already be greater than 0.3V and the converter begin switching at the selected operating frequency. The risetime of the output is dependent on the soft start capacitor, output capacitance, input and output voltage and load current. The scope photo in Figure 10 show the output voltage and the soft start pin voltage at startup. The output voltage is initially at the input voltage less a diode drop. After the converter is enabled the output slowly rises due to the minimum duty cycle of the controller. As the soft start voltage increases, the output voltage rises in a controlled fashion until the output voltage reaches the regulated value.
Soft Start
Conditions: HiDC = HIGH F/2 = LOW
Sync Input (Pin 11)
Gat Drive Output (Pin 14)
Figure 8a.
MIC2186 Sync
Conditions: HiDC = LOW F/2 = LOW
Sync Input (Pin 11)
Gat Drive Output (Pin 14)
Figure 8b. The maximum recommended output switching frequency is 600kHz. Synchronizing to higher frequencies may be possible, however there are some concerns. As the switching frequency is increased, the switching period decreases. The minimum on-time in the MIC2186 becomes a greater part of the total switching period. This may prevent proper operation as Vin approaches Vout and may also minimize the effectiveness of the current limit circuitry. The maximum duty cycle decreases as the sync frequency is increased. Figure 9 shows the relationship between the minimum/maximum duty cycle and frequency.
Max. Duty Cycle vs. Frequency
85
MAXIMUM DUTY CYCLE (%)
80 75 HiDC=H F/2=H 70 65 60 55 HiDC=L 50 F/2=H 45
HiDC=H F/2=L
0V
HiDC=L F/2=L
Figure 10. Voltage Setting Components The MIC2186 requires two resistors to set the output voltage as shown in figure 11
40 250 300 350 400 450 500 550 600 SYNC FREQUENCY (kHz)
Figure 9. Soft start Soft start reduces the power supply input surge current at start up by limiting the output voltage risetime. Input surge current occurs when the boost converter charges up the July 2002 13
MIC2186
MIC2186
MIC2186
Micrel
maximum output current. * Allow the MIC2186 to run in skip mode at lower currents. If running in PWM mode, set the MIC2186 to switch at a lower frequency. * se a ferrite material for the inductor core, which has less core loss than an MPP or iron power core. The significant contributors to power loss at higher output loads are (in approximate order of magnitude): * Resistive on-time losses in the MOSFET * Switching transition losses in the MOSFET * Inductor resistive losses * Current sense resistor losses * Output capacitor resistive losses (due to the capacitor's ESR) To minimize power loss under heavy loads: * Use Logic level, low on resistance MOSFETs. Multiplying the gate charge by the on resistance gives a figure of merit, providing a good balance between switching and resistive power dissipation. * Slow transition times and oscillations on the voltage and current waveforms dissipate more power during the turn-on and turn-off of the low side MOSFET. A clean layout will minimize parasitic inductance and capacitance in the gate drive and high current paths. This will allow the fastest transition times and waveforms without oscillations. Low gate charge MOSFETs will switch faster than those with higher gate charge specifications. * For the same size inductor, a lower value will have fewer turns and therefore, lower winding resistance. However, using too small of a value will increase the inductor current and therefore require more output capacitors to filter the output ripple. * Lowering the current sense resistor value will decrease the power dissipated in the resistor. However, it will also increase the overcurrent limit and may require larger MOSFETs and inductor components to handle the higher currents. * Use low ESR output capacitors to minimize the power dissipated in the capacitor's ESR.
Voltage Amplifier Pin 6 VREF 1.245V
R1
R2
Figure 11. The output voltage is determined by the equation below. R1 R2 Where: Vref for the MIC2186 is nominally 1.245V. Lower values of resistance are preferred to prevent noise from apprearing on the Vfb pin. A typically recommended value for R1 is 10K. Decoupling Capacitor Selection The 1uf decoupling capacitor is used to stabilize the internal regulator and minimize noise on the Vdd pin. Placement of this capacitor is critical to the proper operation of the MIC2186. It must be next to the Vdd and signal ground pins and routed with wide etch. The capacitor should be a good quality ceramic. Incorrect placement of the Vdd decoupling capacitor will cause jitter and/or oscillations in the switching waveform as well as variations in the overcurrent limit. A minimum 0.1uf ceramic capacitor is required to decouple the Vin. The capacitor should be placed near the IC and connected directly between pins 10 (Vcc) and 5 (SGND). A 0.1uf capacitor is required to decouple Vref. It should be located near the Vref pin. Efficiency calculation and considerations Efficiency is the ratio of output power to input power. The difference is dissipated as heat in the boost converter. The significant contributors at light output loads are: * The VinA pin supply current. * The VinP pin supply current which includes the current required to switch the external MOSFETs * Core losses in the inductor To maximize efficiency at light loads: * Use a low gate charge MOSFET or use the smallest MOSFET, which is still adequate for the VO = VREF x 1 +
MIC2186
14
July 2002
MIC2186
Micrel
Package Information
PIN 1
0.157 (3.99) 0.150 (3.81)
DIMENSIONS: INCHES (MM)
0.020 (0.51) REF 0.050 (1.27) BSC
0.020 (0.51) 0.013 (0.33) 0.0098 (0.249) 0.0040 (0.102)
45 0-8 0.050 (1.27) 0.016 (0.40) 0.244 (6.20) 0.228 (5.79)
0.0648 (1.646) 0.0434 (1.102)
0.394 (10.00) 0.386 (9.80)
SEATING PLANE
16-Pin SOIC (M)
PIN 1
0.157 (3.99) 0.150 (3.81)
DIMENSIONS: INCHES (MM)
0.009 (0.2286) REF 0.025 (0.635) BSC 0.0098 (0.249) 0.0040 (0.102)
0.012 (0.30) 0.008 (0.20)
0.0098 (0.249) 0.0075 (0.190)
45
8 0
SEATING 0.0688 (1.748) PLANE 0.0532 (1.351)
0.196 (4.98) 0.189 (4.80)
0.050 (1.27) 0.016 (0.40) 0.2284 (5.801) 0.2240 (5.690)
16-Pin QSOP (QS)
July 2002
15
MIC2186
MIC2186
Micrel
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2001 Micrel Incorporated
MIC2186
16
July 2002

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